Designed for nanometer-scale silicon ICs, a new wire-bond chip-packaging process–called Pad on I/O–by chip manufacturer LSI Logic (Milpitas, CA) places bond pads directly on active copper/low-K ...

Flip chip packaging represents a cutting‐edge assembly technique in which semiconductor devices are mounted upside‐down, enabling direct connection to the substrate via solder bumps. This method not ...

Intel disclosed several chip packaging breakthroughs at the Electronic Components Technology Conference (ECTC), outlining the technical merits of multiple new chip packaging techniques. We spoke with ...

The chip manufacturing industry can be quite complex, and that’s normal. After all, there are multiple factors that go into the performance of a SoC, making it a success or directly ruining a good ...

Lam Research (NasdaqGS:LRCX) has reportedly held takeover talks with BE Semiconductor Industries (BESI). The discussions point to potential M&A activity that could affect the semiconductor equipment ...

In this Q&A, you will learn about some of the technologies and techniques that are making it possible to address advanced packaging challenges.

Tesla's Terafab project launches in 7 days, targeting 2nm chips, $25B investment, and 1M monthly wafer starts by 2030.

The A20 chip widely expected to debut in the iPhone 18 Pro and folding iPhone will take advantage of a new packaging technique, on TSMC's 2nm chip fabrication technology. Rumors about the iPhone 18 ...

TL;DR: Apple has ordered next-gen M5 chips from TSMC for iPad Pro and Macs, with production in 2H 2025. The M5 chips will use TSMC's 3nm process and SoIC technology for better thermal management, with ...